(a). Field of the Invention
This invention is related to the field of frame rate conversion, and especially to the method for frame rate conversion using two buffers.
(b). Description of the Prior Arts
For a display device, such as a CRT or LCD display, frame rate conversion (FRC) is needed when the input frame rate is different from the output frame rate that the display supports, or when two different sources of input frame are to be outputted jointly in one output frame rate. The frame rate, in this aspect, is defined as the number of frames being processed in a unit time. For example, in a commonly used personal computer system, frame rate conversion is needed because the input frame rate from the display card (e.g. VGA card) to the display might be different from the refresh frequency of the display device (i.e. the output frame rate of the display device, which is usually set at 60 Hz). FIG. 1A is a diagram illustrating frame rate conversion. In FIG. 1A, in the aspect of inputting, the display writes a frame into a buffer at each clock period of an input vertical synchronization (v-sync) signal; in the aspect of outputting, the display reads a frame from the buffer at each clock period of an output v-sync signal. In FIG. 1A, the oblique line region represents the part of a frame that actually contains image data, while the porch does not contain any image data. Due to the difference in the input and output frame rates (the period for the input v-sync signal is different from that of the output v-sync signal), frame rate conversion is needed.
A frame buffer is usually used to temporarily store the frame data when frame rate conversion is performed. However, this practice is prone to frame tearing, that is, the top and bottom parts of an actual displayed frame contain image data belonged to different frames. The frame tearing is due to the limited space of the frame buffer. When the difference between the rates of inputting/outputting frame data to/from the buffer is larger than a certain level, either the currently inputted or outputted frame will chase to surpass the previous frame data.
The conventional method for solving this problem is to make use of two frame buffers (denoted as the first and the second buffers). Each frame buffer can store one frame. FIG. 1B is a diagram illustrating the conventional method for solving the problem of frame tearing. It is assumed in this figure that the input frame rate is slower than the output frame rate for the display. The “BUF 1” or “BUF 2” in each oblique line region shows that the region is accessed from the first buffer or the second buffer. The characteristic of the conventional method is that the switching and selection of the buffer is made according to the pulse of the v-sync signal, and the time points of switching and selection are shown by the arrows in FIG. 1B.
However, this conventional method cannot totally avoid the problem of frame tearing. Since the time points of switching and selection are determined according to the pulses of the v-sync signal, it is still inevitable to have the same buffer being read out and write to at the same time, e.g. as shown by the oblique line regions 11-12 and 13-14 in FIG. 1B.